High-Performance Low Power Analog Circuits Design for Interfacing Applications and Data Converters (ADC/DAC).
Selected Publications
Alshehri, A., Alqarni, A., Yang, K. and Fariborzi, H., 2023, June. A 270 fJ/op 5.8 GHz MOS Current Mode Logic D-Latch for High-Speed Application. In 2023 18th Conference on Ph. D Research in Microelectronics and Electronics (PRIME) (pp. 365-368). IEEE.
Alshehri, A., Al-Qadasi, M., Almansouri, A.S., Al-Attar, T. and Fariborzi, H., 2018, December. StrongARM latch comparator performance enhancement by implementing clocked forward body biasing. In 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS) (pp. 229-232). IEEE.
Education
M.S. in Electrical & Computing Engineering (Electro-physics), King Abdullah University of Science & Technology, Saudi Arabia.
B.S. in Electrical and Electronics Engineering, University of Brighton, United Kingdom. Diploma. in Telecommunication, College of Telecom & Electronics, Saudi Arabia.
Professional Profile
2018-2023: PhD Candidate at Electrical and Computing Engineering, KAUST, Saudi
Awards
Jun 2020 Selected among the 10 best projects to win 100,000 SAR funding from KACST "Combating COVID-19 Accelerator" awards offering the best solutions to tackle COVID-19
Aug 2018 Best Ph.D. Forum Award for the paper "A High-Speed Dynamic StrongARM Comparator" in MWSCAS Symposium
Aug 2015 Won 2nd place on Synopsys Olympiad in Saudi Arabia
Aug 2013 Honour Reward from the Saudi Arabian Cultural Mission in the United Kingdom
July 2013 Winner of the Invensys Eurotherm prize for The Best Team Performance
Sep 2012 Honour Reward from the Saudi Arabian Cultural Mission in the United Kingdom
Non-KAUST Affiliations
CEMSE - Computer, Electrical and Mathematical Science and Engineering Division
Research Interests Keywords
Analog/mixed signal design circuitData ConverterROICASICADC
